In a conventional phase locked loop (PLL), the wiring of an internal power supply is extended so as to reach a clock signal outputting circuit after the intermediation of an internal circuit. Power-supply noise reducing means is disposed in the wiring path from the internal circuit to the clock signal outputting circuit.
The above described power-supply noise reducing means is realized by a low-pass filter composed of a resistance element and a capacitor. These circuit elements lead to the problems of increase in the circuit size, increase in cost, etc.